
Commell MPX-2515 User’s Guide Rev 0100
Taiwan Commate Computer Inc.
It is possible to write to sequential registers by continuing to clock in data bytes, as
long as CS# is held low. Data will actually be written to the register on the rising
edge of the SCK line for the D0 bit. If the CS# line is brought high before eight bits
are loaded, the write will be aborted for that data byte and previous bytes in the
command will have been written. The following figure shows the timing diagram of
the byte write sequence.
Figure 3 MCP2515 Write Instruction
#define CCP_CAN_SYSTEM_SERVICE 0X20 /* COMMAND: command code */
#define CAN_WRITE_INSTRUCT 0X88 /* DATA_0: sub-command code */
#define EP2 2 /* Endpoint 2 */
#define EP3 3 /* Endpoint 3 */
OFFSET BULK OUT (EP2) BULK IN (EP1)
SIZEOF_DATA ?? 0X01
COMMAND 0X20 0X20
ERROR 0X00 Error code
DATA_0 0X88 Number of bytes written
DATA_1 Number of bytes to write Checksum
DATA_2 0X02 (constant)
DATA_3 Starting register address
DATA_4 Byte_0
DATA_5 Byte_1
DATA_6 Byte_2
... ...
... ...
DATA_N Checksum
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